KAF-0400 Sensor Head (A2063)

Contents

Description

The KAF-0400 Sensor Head works with the KAF-0400 Head (A2061) to provide clock signals for single CCD image sensor of type KAF-0400, KAF-0401, KAF-0402, or KAF-0261. All these image sensors come in the same 24-pin, 0.8-inch wide ceramic DIP package. The image sensor mounts on the A2063 and the A2063 connects to the A2061 with an eight-way, 1-mm flex cable that can be up to 45 cm long. The A2061 in turn connects to a LWDAQ system as a LWDAQ device. For a description of the Long-Wire Data Acquisition System, see the LWDAQ Manual.

Figure: A2063A Top View with KAF-0400 Image Sensor Installed.

The KAF-series image sensors are vulnerable to static discharge. We have destroyed half a dozen while carrying them around. The A2063 provides zener diode protection for all clock phases on the image sensor. The zener diodes clamp all clock inputs to within 12.7 V of 0V (Z1 to Z5 in the schematic). The supply voltage itself is clamped to 16V (Z7). All other DC voltages required by the sensor we provide with resistive dividers decoupled with capacitors next to the chip.

Figure: A2063A Bottom View.

The clock voltages and the power supply are supplied via the 8-way flex connector, J1. This connector accepts a 1-mm pitch 8-way flex cable.

The A2063A supports the KAF-0400, KAF0401E, and KAF-0402. Its schematic is S2063A. The A2063B supports the same three image sensors, but uses a newer circuit board, schematic S2063B. We set the resistors according to Column B in the schematic. For example, we select U1-2 for video output by loading R9 with 1.0 &Omeag; and omitting R8. The A2063C supports the KAF-0261 image sensor, and receives the resistors listed in Column C version table. Each version of the sensor head is compatible with one or more versions of the KAF-0400 Head (A2061).

Operation

The table below lists the pin on the image sensor package, and how each data sheet says the pin is to be driven.

The image sensors are more tolerant of changes in the clock voltages than the data sheets suggest. The KAF-0400, KAF-0401E, KAF-0402 are all compatible with the S2063A/B and the A2061A/B. The KAF-0261, however, requires higher reset clock levels, φR, and produces its output on a different pin. Thus the KAF-0261 works with the A2063C, which selects the correct output pin, and the A2061C, which provides the correct φR voltages.

Here are the voltages the A2061 and A2063 provide to each sensor pin. We refer to the table above and the A2063B schematic.

VOG: A value of 4.2 V satisfies the data sheets of all image sensors, which we obtain with R1 = 10 kΩ, R2 = 3.9 kΩ.

VDD: A supply of +15 V satisfies all image sensors. To obtain 4 V of output dynamic range from the KAF-0261, the sensor requires VDD = +17 V. But we require only 2 V, for which VDD = +15 V is sufficient.

VRD: Looking at the output amplifier structure, it appears that it is VDD − VRD that should be controlled, and this difference should be around 5.0 V. With R3 = 4.7 kΩ, R4 = 10 kΩ we have VRD = 10.2 V, which is 4.8 V below VDD.

φR: The reset clock drives the gate of an N-channel depletion-mode mosfet. The gate-source threshold for such transistors is of order −2 V. In each sensor, VOG sets the nominal voltage of the output transistor gate. The reset transistor connects the gate to VRD, thus draining it of pixel charge. To turn on the reset transistor, φR must be VOG − 2 V or higher. To turn off the same transistor, we should have φR at VOG − 4 V or lower. But we find that the KAF-0261 really does require φR to be higher. The A2061C provides φR from +0.0 V to +8.7 V, and this gives us sharp images.

VSS: A value of 1.5 V will satisfy all sensors. We set VSS with the two diodes in an MA198 diode array (this chip is obsolete, but we have lots of them). The VSS current is of order −0.5 mA, at which the forward drop of each diode is 0.75 V, making VSS 1.5 V exactly.

φH1 and φH2: The horizontal clock should be such that its LO value is 4 V lower than VOG and its HI value is at least equal to VOG. The data sheets say otherwise, but they also allow for considerable variation in VOG and VRD, which affects the values of the clock voltages. So we set the horizontal clock HI to 5.5 V and the LO to −3.5 V.

φH21 and φH22: These exist only in the KAF-0261. The former we connected to φH2, but the latter should be connected to the horizontal clock LO potential. This is inconvenient for us, because we don't have this potential as a separate stable signal on our A2063 circuit. So we tie φH22 to 0V, which is still 4V below VOG, so the output transistor gate will still be more attractive to pixel charge than either φH22 when φH22 is LO. In any case, in the KAF-0401E and KAF-0402, the φH22 pin must be connected to 0 V.

φV1 and φV2: These are pretty much the same for all versions, so we will supply LO = −11 V and HI = 0 V, as from the A2063.

GUARD: We connect to 11.5 V. We find this works with the KAF-0400, and is consistent with the other specifications. We have R5 = 3.3 kΩ, R6 = 10 kΩ.

VLG: Is connected only in the KAF-0261, and should be wired to VSS.

Electronics

Note: All our schematics and Gerber files are distributed under the GNU General Public License.

S2063A_1: Schematic for A2063A, compatible with KAF-0400, KAF-0401E, and KAF-0402.

S2063B_1: Schematic for A2063B, compatible with KAF-0400, KAF-0401E, KAF-0402, and KAF-0261.

A206301C.zip: Printed Circuit Board for A2063A. This board is matches the S2063A schematic, but is incorrectly named on the silk screen "A206301B", confusing it with its faulty predecessor, the A206301B.

A206301D.zip: Printed Circuit Board for A2063B and A2063C. This board matches the S2063B schematic.

A206301D.pdf: All-Layer View of A206301D Printed Circuit Board.