Input-Output Head (A2057) Manual

© 2004, Mike Bradshaw, Brandeis University
© 2008-2020, Kevan Hashemi, Brandeis University


Command Bits
Analog Inputs
Digital Outputs
Analog Outputs
Obsolete Versions


[20-FEB-20] The Input-Output Head (A2057) is a LWDAQ device that provides two analog inputs, two analog outputs, and four open-drain digital outputs. We read and display the analog inputs and set the logic outputs with the LWDAQ Voltmeter Instrument. The A2057's analog outputs are provided by two eight-bit serial digital-to-analog converters (DACs). To set the output voltages of the DADs, we must instruct LWDAQ to transmit a special sequence of commands to the A2057, as detailed below.

Figure: The Input-Output Head (A2057H). (Printed circuit board drawing filling in until we have assembled circuits.)

Vertical BNC sockets J2 and J3 provide connection to an oscilloscope probe or a coaxial cable. The default input impedance at the socket is 1.0 MΩ in parallel with 10 pF, as is standard for an oscilloscope input. Between the input and its buffer amplifiers are a 10 kΩ resistor and diode clamps that limit the input voltage to ±15 V. The dynamic range of the inputs is ±10 V, but they can tolerate ±500 V. We may add simple filter to each input circuit by cutting a track on the top side of the board. These tracks are boxed on the silk screen and labelled X1 and X2. Having cut the track, the left pad will present the in put signal and the right pad is the continuation to the default input circuit. A 30-MΩ resistor between the X1 pads, for example, will provide a ÷31 divider and allow us to measure ±310 V on X1.

The digital outputs are presented on four-way plug P1. These we can either connect to zero with a transistor or leave high-impedance. Each transistor provides a diode that conducts when the digital output drops below −0.7 V. The maximum voltage on a digital output when high-impedance is 30 V. To accompany the digital outputs we provide a 0-V connection on all four corner mounting holes, as well as on P2-2 and P2-4.

The analog outputs are presented on a four-way plug P2. They are 0-10 V voltages generated by an op-amp with a 1-kΩ series resistor. They will tolerate a short circuit indefinitely. We set the output voltages with a string of LWDAQ commands that write an eight-bit value to one of the two on-board DACs.

The A2057 connects its 0V potential to its four mounting holes. But it does not connect the shield of its LWDAQ socket to the 0V potential. The LWDAQ grounding rules prohibit a connection between the 0V potential and the shield, in order that we may avoid ground loops in large experiments.

As a LWDAQ device, the A2057 is designed to wake up and take measurements, then go back to sleep. In the awake state, the circuits internal ±15 V analog power supplies are turned on. But in the sleep state, they are turned off. The digital outputs do not use the ±15 V power suppliess. They are powered by the 3.3 V logic supply, which never turns off. The digital outputs will persist when the A2057 is asleep. When we measure input voltages, we wake up the board, measure the voltages, and put the board to sleep again. When we use the analog outputs, however, we must not send the board to sleep after configuring the outputs, or else the analog output amplifiers will lose power. The Voltmeter Instruments daq_no_sleep option leaves the A2057H awake between measurements. The analog outputs will be unaffected by voltage measurements.


Note: All our schematics and Gerber files are distributed under the GNU General Public License.

A2057H.ods: Bill of materials for the A2057H.
S2057_1: The LWDAQ socket, LVD transceiver, and power switches.
S2057_2: The serial command decoding logic and command bit register.
S2057_3: Analog input resistors, clamp, and buffer.
S2057_4: Analog input selector and reference voltages.
S2057_5: Open-drain mosfets and digital to analog converters.
S2057_6: Analog output amplifier and series resistor.
S2057W_1: Auxilliary circuit for resistive sensors.
A205701F: Input-Output Head
A205701G: Voltmeter Head
A205701H: Voltmeter Head
NDS355AN: Digital output mosfet.
TLV5623: Eight-bit serial digital to analog converter.
TL081: Classic JFET-input op-amp.


The two four-way plugs P1 and P2 are 0.1" pitch headers with gold-plated pins a single back-wall locking latch (such as Molex 0022112042). To mate with these connectors, we use crimp terminal (such as Molex 0008550102) in a four-way housing (such as Molex 0022013047). Pin one of each plug is on the left when the locking latch is to the rear, and is also marked by a square pad visible on the bottom side of the board. The signals on P1 and P2 are marked on the silk screen.

1Y1, Analog Output 1
20V, Connected to Mounting Holes
3Y2, Analog Output 2
40V, Connected to Mounting Holes
Table:Pinout of P2.

Each pin on P2 is the drain of an NDS355AN mosfet. The outputs Q1..Q4 are controlled by device command bits DC1 to DC4 (OUT1 to OUT4).

1Q1, Digital Output 1, MOSFET Drain
2Q2, Digital Output 2, MOSFET Drain
3Q3, Digital Output 3, MOSFET Drain
4Q4, Digital Output 4, MOSFET Drain
Table:Pinout of P2.

When DCn is HI, the MOSFET of Qn turns on, connecting Qn to 0 V through a resistance of approximately 0.2 Ω. When the command bit is LO, the mosfet is off and Qn is open circuit, except for the clamping diode that turns on when Qn drops below −0.7 V.

Command Bits

The table below gives the assignment of LWDAQ command bits to the A2057 functions.

Table: Command Bit Allocation.

To determine the command word that will implement a particular operation on the A2057, write out sixteen bits in a row, starting with bit sixteen (DC16) on the left, and ending with bit one (DC1) on the right. Set each bit to zero or one as you require. The left-most four bits form the most significant nibble of the sixteen-bit command word. The right-most four bits are the least significant nibble. Translate each nibble into a hex digit, and you have the hex version of the command word.

The A2057 provides four analog input channels. We set one and only one of the ON1..ON4 bits to select one and only one of the four analog inputs for amplification and transmission back to the LWDAQ Driver. In the LWDAQ Driver, this input is available to for 16-bit analog to digital conversion. The A2057's two analog inputs are selected by bits ON1 and ON2. The ON3 and ON4 channels are connected to 0V and 5V respectively, and allow the Voltmeter Instrument to auto-calibrate the A2057.

The A2057 provides two amplifier gains, one of which is eleven times higher than the other. We call them the ×1 and ×11. The GSEL bit, when set, selects the higher gain. With ×1 gain, the dynamic range of the two analog inputs is ±15 V. With ×11 gain, the range is ±1.5 V.

The A2057 uses two Texas Instrument's TLV5623 8-bit digital-to-analog converters. The output of each DAC is passed through an adjustable op-amp gain stage.

The A2057 uses four NDS355AN n-channel mosfets. When OUTn is asserted, signal Qn will be connected to 0 V through one of these mosfets. When OUTn is unasserted, OUTn will be open-circuit.


We control and read out all versions of the A2057 with the LWDAQ Software software. We read out the A2057 analog inputs with the software's Voltmeter Instrument. The same instrument allows us to set the digital outputs. We set the analog outputs with a TclTk script, as we describe below. The A2057 Tester script is an example LWDAQ Tool that allows us to test all aspects of the A2057. You can run it with "Run Tool" in the Tool menu. You will find the data acquisition steps required to control and read out the A2057 in Voltmeter.tcl, which is the TclTk script that defines the Voltmeter Instrument. In Driver.tcl you will find the routines that compose TCPIP messages to communicate with a LWDAQ Driver.

Analog Inputs

The A2057 provides two analog inputs on J2 and J3, which are BNC connectors and are set up for use with ×10 oscilloscope probes. For existing software to read the analog inputs, see above. Here we describe how to select the analog inputs with LWDAQ command words. To select analog input n we set bit ONn and clear the other three ON bits. We set GSEL if we want ×11 gain. We set WAKE to provide power to the amplifiers. We clear LB because we do not want the LVDS transmitter to assert a logic level on the R lines. We must set the OUT1..OUT4 bits to be consistent with the desired state of these four digtal outputs Q1..Q4. If we are not using them, then we can clear them all. But if we want them to remain in the same state, we must set them to the same values we used in the previous command word we sent to the A2057.

Once we have transmitted a command word, the A2057 asserts an analog voltage on the R signal back to the LWDAQ Driver. There we can digitize the voltage with LWDAQ driver commands. The following commands select analog input number one and digitize it 100 times with the sixteen-bit ADC in the LWDAQ Driver, leaving the 100 samples stored in the first 200 bytes of the driver memory. The samples are spaced by 8000 "delay ticks", each of which is 125 ns for a 1 kSPS sample rate. The driver job number "11" is the 16-bit ADC convert and store job.

LWDAQ_transmit_command_hex $sock "0090"
LWDAQ_set_repeat_counter $sock 99
LWDAQ_set_delay_ticks $sock 8000
LWDAQ_execute_job $sock 11

The voltage returned to the LWDAQ Driver is linear with respect to the voltage applied to the A2057 input. We can determine the input voltage from the driver voltage if we have an intercept and slope. We obtain the intercept and slope by reading input channels three and four (ON3 and ON4), which provide us with a known 0-V and 5-V input at the A2057. The Voltmeter Instrument uses these reference inputs to auto-calibrate the voltage it reads from the A2057.

You will find the above steps implemented with Tcl in Voltmeter.tcl and also in our example script A2057_Tester.

Digital Outputs

The four digital outputs are set by the four independent OUT1..OUT4 bits in the command word. When one of these bits is set, its corresponding digital output pin on connector P1 will be connected to 0V by an NDS355AN transistor. The channel resistance of this transistor with a 3.3-V gate voltage is around 0.2 Ω. When the OUT bit is clear, the transistor is turned off, so the output pin is open-circuit. The outputs are "open-drain". If we connect them to +15V with a 10-kΩ resistor, we will see +15 V on the output pin when the OUT bit is clear, and 0 V when the bit is set. We can use these mosfets to turn on relays and lamps, but note that they include a diode between the drain and source, which prevents the output pin from dropping below −0.7 V.

Analog Outputs

The A2057 analog outputs are provided by two eight-bit serial DACs. The DAC outputs are amplified and buffered by two op-amps. The analog outputs are presented on connector P2 as described above. The Voltemeter Instrument does not allow us to set the analog outputs. Instead, we must send a sequence of commands to the A2057 to configure one of its 8-bit DACs. These commands control the DAC serial data input and serial clock directly, and so clock in a new sixteen-bit DAC word, of which eight bits dictate the analog output from the TLV5623 eight-bit DAC. Do not confuse the 16-bit LWDAQ command with the 16-bit DAC control word. We use a sequence of LWDAQ commands to send a single DAC control word. The Set Voltage script is an example Toolmaker script that allows us to set the analog outputs. You can run it with Run Tool from the LWDAQ Tool menu.

The first four bits of the DAC's sixteen-bit control word are control bits. The next eight bits are the DAC value. The final four bits are all zeroes. The A2057 uses six command bits to control the DACs. These bits are DIN (DC16), SCLK (DC15), FS (DC14), DAC2 (DC12), DAC1 (DC11), and WAKE (DC8). The DAC1 and DAC2 bits select which DAC to use. We can assert one or both, to select one or both DACs. The DAC1 and DAC2 signals are effective only when FS is asserted. The WAKE bit must be asserted to provide power to the A2057. The FS, or frame synchronize, must be asserted once at the beginning of each data word transfer, and once again at the end of each data word transfer. The DIN, or data input, bit is the serial data bit that delivers DAC instruction. The falling edge of SCLK clocks DIN into the selected DACs.

A sixteen-bit control transmission to a DAC requires a total of thirty-five command transmissions, which takes 140 μs. The maximum square-wave output frequency of the DACs is 3.5 kHz. The list below gives an example command word sequence that sends one control word to DAC1. The DAC integer value is 246, or binary 11110110. We give the LWDAQ commands as hex values. The most significant nibble pulses SCLK, and the last three nibbles stay the same for a given DAC. Some of the bits in the sixteen-bit serial word are not used by the DAC, so we give them the name "X" and set them to zero. We use "0x" to mean "hexadecimal".

  1. Start Transmission: 0x6080 (DIN=0, SCLK=1, FS=1, DAC2=0, DAC1=0)
  2. Select DAC1: 0x6480 (DIN=0, SCLK=1, FS=1, DAC2=0, DAC1=1)
  3. Present Bit 15 (X): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  4. Clock Bit 15 (X): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  5. Present Bit 14 (SPD): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  6. Clock Bit 14 (SPD): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  7. Present Bit 13 (PWR): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  8. Clock Bit 13 (PWR): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  9. Present Bit 12 (X): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  10. Clocl Bit 12 (X): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  11. Present Bit 11 (Value Bit 8): 0xC480 (DIN=1, SCLK=1, FS=0, DAC2=0, DAC1=1)
  12. Clock Bit 11 (Value Bit 8): 0x8480 (DIN=1, SCLK=0, FS=0, DAC2=0, DAC1=1)
  13. Present Bit 10 (Value Bit 7): 0xC480 (DIN=1, SCLK=1, FS=0, DAC2=0, DAC1=1)
  14. Clock Bit 10 (Value Bit 7): 0x8480 (DIN=1, SCLK=0, FS=0, DAC2=0, DAC1=1)
  15. Present Bit 9 (Value Bit 6): 0xC480 (DIN=1, SCLK=1, FS=0, DAC2=0, DAC1=1)
  16. Clock Bit 9 (Value Bit 6): 0x8480 (DIN=1, SCLK=0, FS=0, DAC2=0, DAC1=1)
  17. Present Bit 8 (Value Bit 5): 0xC480 (DIN=1, SCLK=1, FS=0, DAC2=0, DAC1=1)
  18. Clock Bit 8 (Value Bit 5): 0x8480 (DIN=1, SCLK=0, FS=0, DAC2=0, DAC1=1)
  19. Present Bit 7 (Value Bit 4): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  20. Clock Bit 7 (Value Bit 4): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  21. Present Bit 6 (Value Bit 3): 0xC480 (DIN=1, SCLK=1, FS=0, DAC2=0, DAC1=1)
  22. Clock Bit 6 (Value Bit 3): 0x8480 (DIN=1, SCLK=0, FS=0, DAC2=0, DAC1=1)
  23. Present Bit 5 (Value Bit 2): 0xC480 (DIN=1, SCLK=1, FS=0, DAC2=0, DAC1=1)
  24. Clock Bit 5 (Value Bit 2): 0x8480 (DIN=1, SCLK=0, FS=0, DAC2=0, DAC1=1)
  25. Present Bit 4 (Value Bit 1): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  26. Clock Bit 4 (Value Bit 1): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  27. Present Bit 3 (0): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  28. Clock Bit 3 (0): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  29. Present Bit 2 (0): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  30. Clock Bit 2 (0): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  31. Present Bit 1 (0): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  32. Clock Bit 1 (0): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  33. Present Bit 0 (0): 0x4480 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=1)
  34. Clock Bit 0 (0): 0x0480 (DIN=0, SCLK=0, FS=0, DAC2=0, DAC1=1)
  35. End Transmission: 0x4080 (DIN=0, SCLK=1, FS=0, DAC2=0, DAC1=0)

The routine below performs the above operation for us, for any decimal value 0..255, by making contact with a driver, selecting the A2057 device, and constructing and transmitting the thirty-five commands.

# A2057_set_dac takes a driver IP address, ip, a driver socket number, dsock,
# a multiplexer socket number, msock, a dac number, dac, and an eight-bit dac
# value in decimal, value, and these to set an A2057 dac value. The routine
# opens a socket, selects the A2057 and sends a string of thirty-five commands
# to the device to set one of its DAC outputs.
proc A2057_set_dac {ip dsock msock dac value} {

	# Construct the sixteen bit value we must send to the DAC.
	if {![string is integer -strict $value]} {
		error "value \"$value\" not an integer."
	if {($value>255) || ($value<0)} {
		error "value \"$value\" must be 0..255."
	set bits 0000[LWDAQ_decimal_to_binary $value 8]0000
	# Open a socket to the driver and select the A2057.
	set sock [LWDAQ_socket_open $ip]
	LWDAQ_set_driver_mux $sock $dsock $msock
	# Assert the frame sync bit.
	LWDAQ_transmit_command_hex $sock "6C80"
	# Select DAC1 or DAC2.
	if {$dac == 1} {set c "480"} else {set c "880"} 
	LWDAQ_transmit_command_hex $sock "6$c"
	# Transmit sixteen bits. Each bit requires two command words, one
	# to present the bit value and raise the clock, another to continue
	# the bit value while dropping the clock.
	for {set i 0} {$i < [string length $bits]} {incr i} {
		set b [string index $bits $i]
		if {$b} {
			LWDAQ_transmit_command_hex $sock "C$c"
			LWDAQ_transmit_command_hex $sock "8$c"
		} else {
			LWDAQ_transmit_command_hex $sock "4$c"
			LWDAQ_transmit_command_hex $sock "0$c"
	# End the transmission by deselecting both DACs.
	LWDAQ_transmit_command_hex $sock "4080"
	# Close the socket to the driver, freeing it for other activity.
	LWDAQ_wait_for_driver $sock
	LWDAQ_socket_close $sock

The DAC outputs feed into their own adjustable-gain, adjustable-offset amplifier. By default, the A2057H amplifier takes the 0..3.3 V output of the DAC and amplifies it to 0..13 V. By choosing amplifier resistor values, we can provide alternate ranges and offsets, such as −10..+9.6 V, according to the equations found on schematic page S2057_6.

Obsolete Versions

The history of the A2057 is confused by errors in the circuit diagram, since corrected, errors in labelling printed circuit boards, and modifications to the circuit that are not recorded. In February 2020 we retired all previous versions of the circuit to make way for the A2057H.

Figure: Input-Output Head (A2057A). The printed circuit board is part number A205701F.

The A2057A provides three 4-way plugs for the inputs and outputs, as well as a grid of holes for additional circuits and connectors. The J2 connector accepts two analog inputs, J3 provides two analog outputs, and J4 provides four digital outputs. Despite being named J1..J3, these connectors are plugs, not sockets.

Figure: Voltmeter (A2057V) with Open Enclosure. The printed circuit baord is part number A205701G.

The A2057V comes in a PPL enclosure. It provides two BNC plugs for the two analog inputs, allowing them to be used with oscilloscope probes. The LWDAQ device socket is set in the end wall opposite the BNC connectors. Two 4-way plugs provide four digital outputs (J4) and two analog outputs (J3). The enclosure as shown does not give external access to the digital or analog outputs, but is easy to cut additional holes in the cover.

Figure: Voltmeter (A2057V) with Closed Enclosure.

The Wheatstone Bridge Head (A2057W) adds a differential amplifier to the front end of the A2057A, as well as a 10-V power supply, as shown in S2057W_1. The A2057W allows us to power and read out most Wheatstone Bridge sensors. We connect the sensor to the new J100 plug, which provides 10-V power and accepts a differential input A/B from the bridge.

Figure: The Wheatstone Bridge Head (A2057W).

In the A2057W implementation shown above, we cut traces to J4 and put J100 in its place. All differential amplifier parts are installed on the patch area provided by the circuit board. Note that the A205701F circuit board, used by the A2057W, does not leave adequate clearance for metal standoffs in its top-left corner. There are several vias that will make contact with a hex nut on the top side of the board.

The A2057W is built on the A205701F circuit board. We cut the traces to J4 and use the J4 footprint for the four-way J100 connector.

Table:Pinout of J100 on A2057W.

The Wheatstone Bridge amplifier circuit has inputs A and B and produces an output 101×(AB). This output is called XX1 and connects to J2-1, where it is buffered and becomes X1, the first analog input of the A2057. Another output from the amplifier is A itself, which connects to J2-3, and so becomes X2.


[19-FEB-20] Submit A205701H with red silk screen and HASL finish for fabrication on a five-day turn.